Computer Business Review

HP delivers the last of the PA-RISC processors

CBR Staff Writer

18:30, May 31 2005

While Sun Microsystems gets a lot of credit for creating the RISC/Unix workstation market and its follow-on server market, it was none other than Hewlett-Packard that bet the farm on RISC/Unix back in the late 1980s to replace the CISC processors used in its HP 3000 minis to commercialize Unix and RISC for midrange server customers. And yesterday, the last of its home-grown RISC chips, the PA-RISC 8900, was launched.

The PA-7000s were among the first 32-bit RISC processors in the market, back in the early 1990s, and they helped establish HP as a force in the server market, particularly among midrange customers who liked HP's proprietary HP 3000 machines but who wanted to adopt Unix to get the price/performance and software portability benefits that came from open systems.

In 1996, HP moved to the 64-bit PA-8000 designs, and took many of the ideas it developed in the course of creating these processors to help Intel create the Itanium processor and its EPIC instruction set. The PA-8900 has been in development for years, just in case the migration to the Itanium line of RISC-like processors did not go as smoothly as planned.

The PA-8900 is not a radical departure from the current Mako PA-8800 processor, which was announced in February 2004 as HP's first dual-core RISC processor. This makes sense, considering that HP wants its Unix customers to move to Itanium-based Integrity servers. The PA-8800 was, in fact, two PA-8700+ processor cores that have been tweaked to improve branch prediction and are then put on a single chip. Each core in the PA-8800 had its own 1.5MB L1 data and instruction cache, and they linked together to a shared 32MB L2 cache that is off chip but in the packaging of the processor complex.

This L2 cache is made up of four 8MB DRAMs linked to the cores by via a 300MHz memory bus that can access data with a 13.3 nanosecond latency and deliver 10GB/sec of L2 cache bandwidth. The PA-8800 has a 128-bit, 400 MHz (double-pumped 200 MHz) system interface bus that delivered 6.4GB/sec of bandwidth into the chip.

This system interface bus is, by the way, the same one used in the Itanium 2 processors, which means the PA-8800s and Madisons can plug into the same Pluto zx1 and Pinnacles sx1000 chipsets used in the Integrity line. The PA-8800 had 300 million transistors and was made by rival IBM's Microelectronics Division using a 130 nanometer copper process, and so were the final iterations of the Alpha EV7 processors.

Last February, HP said that the PA-8900 was due in 12 to 15 months, and the company has met that deadline--something that is important to existing HP 9000 customers who want to see HP make good on its promises. Sources at HP say that contractual obligations require them to not divulge who is making the PA-8900s, but it makes sense that it is either IBM, which made the PA-8700+ and PA-8800 chips, or Intel, might have picked up the job. (I am betting not.)

The PA-8900 is made in a 130 nanometer chip process as well. The big difference is that the shared L2 cache on the chip package has been increased to 64MB, double what the PA-8800 had. This cache has been brought closer to the processor cores, which increases performance, and HP has also added an on-chip cache controller to boost performance further. Error correction electronics have also been added for data tags, cached data, and in-flight data as it moved around the processor complex to improve reliability.

Some PA-8900s will also run at a slightly higher clock speeds: 800MHz, 900MHz, 1GHz, and 1.1GHz compared to the 800MHz, 900MHz, and 1GHz speeds of the PA-8800. HP says that the performance of the PA-8900 should be about 16% better than that of the PA-8800, thanks to that modest clock speed increase and that much larger L2 cache. Presumably, that is comparing the performance of the 1GHz PA-8800 to the 1.1GHz PA-8900.

HP says the PA-8900 chips can plug into any existing Superdome system, even including machines that used the PA-8600s back in the original Superdome announcement in September 2000. It is unclear if they can also be plugged into other HP 9000 Unix servers. The entire HP 9000 rp Series of entry and midrange servers and the high-end Superdome servers have been tweaked to include the new dual-core PA-8900.

Prices range from $4,300 for the entry rp3410-2 to $113,600 for the Superdome in base configurations. HP is offering in-box upgrades to customers who want to move their existing frames to the new processors, and says further that HP-UX 11i v1 (which was only available on PA-RISC processors) and HP-UX 11i v2 (which has been available on both PA-RISC and Itanium processors since last year) are supported on these machines.

Concurrent with the announcement, HP said it will now allow cell boards based on PA-RISC and Itanium processors to be mixed within HP 9000 and Integrity servers. This is, as I have pointed out in the past, something that has always been technically possible, but according to HP sources, this capability is only being introduced now because HP has had enough customer requests for this mixing of CPU cell boards that it has tested and qualified the myriad possible combinations that customers could deploy.

By the way, some HP materials say the mixing can happen in HP 9000 Superdome while other documents say HP Integrity Superdomes. From a marketing standpoint, these have not been the same machines, but from a technical standpoint, they always have been the same machines. The division was merely that HP 9000 meant PA-RISC and Integrity meant Itanium.

The main point now is that HP 9000 customers can buy some Itanium cell boards and test out their software without having to do a box swap, and Integrity customers can make use of their PA-RISC boards even after they make a move. This strategy may impact HP's sales in the short term, but it will improve customer satisfaction in the long term.


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