“The RISC-V ISA has pursued minimalism to a fault”
Alibaba has unveiled its own indigenous processor based on the RISC-V open source chip architecture, as Chinese efforts to wean industry of reliance on western silicon continues in the wake of Trump’s ban on sales of advanced technologies to Huawei.
Alibaba says its new Xuantie 910 can underpin advanced applications including edge computing and autonomous driving. The move will mitigate the risk of Chinese firms losing access to the widely used architecture of Softbank’s UK-based Arm, as well as reducing their licencing costs; even if they secure sustained access to Arm IP.
The processor appears to be the most powerful yet built using the RISC-V architecture, which names some heavyweight supporters, and lets users build their own system-on-chips by taking the royalty-free RISC-V cores from GitHub, customising/optimising them as they see fit, then passing the design to a fab lab of their choice.
What is RISC-V?
The RISC-V Foundation describes its project as “the equivalent of everyone having a micro architecture license” owing to its open instruction set architecture (ISA).
Founded in 2010 at the University of California, Berkeley, the RISC-V foundation, which includes Google, Nvidia, and Qualcomm among others, now names 25 Chinese companies as members, including Huawei, ZTE’s Sanechips, and Xiaomi.
(Standard RISC-V extensions can be implemented, but the base ISA is frozen forever. As a result, software needs to only be written once, and it runs forever on any RISC-V core.)
RISC-V has a highly modular instruction set, and among its purported benefits: if engineers are implementing a soft RISC-V core in an FPGA, often the register transfer-level (RTL) source code is available. As the foundation notes: “Since RISC-V is royalty free this creates significant flexibility to port a RISC-V based design from an FPGA to an ASIC or another FPGA without any software modifications.”
Not everyone is a fan, however: as one former Arm engineer notes: “The RISC-V ISA has pursued minimalism to a fault. There is a large emphasis on minimizing instruction count, normalizing encoding, etc. This pursuit of minimalism has resulted in false orthogonalities (such as reusing the same instruction for branches, calls and returns) and a requirement for superfluous instructions which impacts code density both in terms of size and number of instructions… [while] Highly unconstrained extensibility. While this is a goal of RISC-V, it is also a recipe for a fragmented, incompatible ecosystem and will have to be managed with extreme care.”
Gartner flagged the ongoing shift toward indigenous chips last week, noting that the US-China trade clash will accelerate China’s domestic semiconductor production, as well as create local forks of technologies: “Many companies will seek to diversify their manufacturing base to reduce any further disruption” analyst Ben Lee noted.
Alibaba says it will monetise its processor IP by licensing it to chipmakers, but the company will also release parts of related code on Github.