In the biggest advance in semiconductor packaging since the original dual in-line package, Anamartic Ltd, the Milton, Cambridge company founded by Sir Clive Sinclair, yesterday unveiled its first product, the 40Mb Wafer Stack. The Wafer Stack consists of two 6 wafers, each containing 202 1M-bit memory chips, together with proprietary Conlog configuration logic. The memory […]
In the biggest advance in semiconductor packaging since the original dual in-line package, Anamartic Ltd, the Milton, Cambridge company founded by Sir Clive Sinclair, yesterday unveiled its first product, the 40Mb Wafer Stack. The Wafer Stack consists of two 6 wafers, each containing 202 1M-bit memory chips, together with proprietary Conlog configuration logic. The memory array is organised in a logical spiral from the outside to the middle of the wafer, and the Conlog logic not only enables the wafer at set-up to be program-med by external software to bypass any chips that failed altogether, but also to use the good parts of chips where only a handful of memory cells are no good. Anamartic calls this soft wafer scale logic, a key benefit of which is that it does not alter standard semiconductor manufacturing processes or require physical modifications to the wafer after it has been fabricated. Moreover it continues to run diagnostics in background so that if any part of the memory deteriorates into a marginal condition in a part of one of the dice, this is switched out and replaced by a spare good area. The wafers are being fabricated by Fujitsu Ltd in Japan and the first Wafer Stacks – designed to be used as very fast semiconductor secondary storage – are going to Tandem Computers Inc for evaluation. Both companies are shareholders in Anamartic, and Tandem expects to be the first to incorporate the Wafer Stack into a product. Although the concept is initially being applied to the simplest semiconductor element, a dynamic random access memory chip, it is equally applicable to static and read-only memories, and to CPUs. Thus Fujitsu Ltd could apply the technology to lay a full Sparc processor with cache and complete main memory on a single wafer with dramatic improvements in performance and reliability – and reduction in cost: the labour-intensive costs of dicing the wafer, throwing many damaged chips away and packaging each of the surviving ones is eliminated. The technology makes possible a notepad-sized computer delivering 20 MIPS in a couple of years. The Wafer Stack has a Nat-ive Mode Interface and optional SCS interface: the native mode interface has access time of 200 microseconds and average transfer rate of 1.6Mbytes-per-second, 5Mbytes burst. With SCSI, access time is under 1mS with average transfer rate of 3Mbytes-per-second. Power consumption is a hefty 42W maximum at 5.25Vv and forced air cooling is needed. Designed in an 8 form factor the Wafer Stack can contain up to eight wafers – four storage modules, for 160Mb capacity. OEM samples, including wafer controller and SCSI cost $11,680 for the 40Mb version, $33,590 for 160Mb. Anamartic sees the Wafer Stack being used particularly in high-volume transaction processing systems. Sir Clive Sinclair’s holding in the company, which has raised only about $15m in total, is now down to 5%; he retains a seat on the board. Institutional investors are Barclays Bank Plc, Advent Ltd, Baronsmead Venture Capital Associates, Legal & General Plc and Murray Technology Ltd.