The industry’s multiprocessing unit gurus assembled at the Microprocessor Forum in California late last year looked into their crystal balls and predicted that by the middle of the decade a typical high-end microprocessor would run at 250MHz to 300MHz with about 64Kb of on-chip cache and a maximum issue rate of four to six instructions […]
The industry’s multiprocessing unit gurus assembled at the Microprocessor Forum in California late last year looked into their crystal balls and predicted that by the middle of the decade a typical high-end microprocessor would run at 250MHz to 300MHz with about 64Kb of on-chip cache and a maximum issue rate of four to six instructions a cycle, double today’s leading silicon. There will also probably be a strong emphasis on chips for portable computers with battery life being the driving factor in microprocessor design. Current techniques like superscalar design and on-chip cache are reaching their limits and future performance increases may require new computing paradigms including a trend to single-chip multiprocessors. Performance improvements will probably require a change in the way software that is written.