The new 3D stacked structure increases capacity and performance.
The companies are currently piloting the 256Gb, 3-bit-per-cell (X3) BiCS FLASH chips in their new Yokkaichi fabrication plant in Japan. Shipping of the new chip is expected to start in 2016.
Earlier this year, Toshiba unveiled the first 48-layer 3D V-NAND chips with 128Gbit of capacity.
The new 256Gbit flash chip can be used for various applications such as consumer SSDs, smartphones, tablets, memory cards, and enterprise SSDs for data centres.
Toshiba went ahead towards optimisation for mass production since unveiling the prototype BiCS FLASH technology in June 2007.
The company is promoting migration to BiCS FLASH by rolling out a product portfolio in order to address further growth in the flash memory market in the future.
Toshiba America Electronic Components memory business unit senior vice president Scott Nelson said: "From day one, Toshiba’s strategy has been to extend our floating gate technology, which features the world’s smallest 15nm 128Gb die.
"Our announcement of BiCS FLASH, the industry’s first 48-layer 3D technology, is very significant in that we are enabling a competitive, smooth migration to 3D flash memory – to support the storage market’s demand for ever-increasing densities."