The industry-busting alliance on twenty-first century microprocessors has been cooking since last year The agreement between Hewlett-Packard Co and Intel Corp to merge their future 64-bit RISC architectures so wrong-footed the commentators that its significance tended to be lost, and the major papers gave it far less prominance than it clearly deserved. The two are […]
The industry-busting alliance on twenty-first century microprocessors has been cooking since last year
The agreement between Hewlett-Packard Co and Intel Corp to merge their future 64-bit RISC architectures so wrong-footed the commentators that its significance tended to be lost, and the major papers gave it far less prominance than it clearly deserved. The two are joining forces to design and produce high-volume chips that will be needed for everything from mobile technologies, to personal computers, workstations, servers and enterprise computing products by the end of the decade. The two say the new architecture, currently nameless, will offer backwards binary compatibility with the current CPU families of both via compiler technology and with their interim processor products. There are no indications of the new architecture’s size, density, geometry or prospective power. Nevertheless it will host multiple operating systems natively, and the companies confirmed that the work that Hewlett-Packard is doing on Very Long Instruction Word Trace compilers or wide-word technology inherited from the pioneering efforts of Multiflow Computers Inc will be a key part of the joint development effort. Specific details were sparse, but Hewlett-Packard’s director of computer systems marketing in Europe, Bernard Guidon, told our sister paper Unigram.X that the two firms are now beginning the second stage of what they have planned to be a three-part process. It has been clear since the agreement was announced that the thing has been cooking for many months, and the only surprise is that they managed to keep it quiet, especially since part of the preliminary process must have been to try to get the firmest assurances possible that the regulators in Washington would nod the agreement through – few would happily entrust a deep secret with a host of civil servants. But the fact that the thing is well under way is confirmed by the fact that according to Guidon, the first stage, in which the firms have designed technologies that will feature in separate interim CPUs seen as stepping-stones between their current architectures and the new chip set is already complete. In Hewlett-Packard’s case this is the PA-9000, a 64-bit part expected in the 1996-97 timeframe. The second phase, now under way, is the design and development of the new processor itself – described as beyond RISC and complex instruction set, which will come in multiple guises tailored for different sections of the market, including low-cost and lower performance implementations. Design of new semiconductor processes for the silicon, plus compiler and associated software development is also included in this phase. The third phase is getting the architecture into systems. Hewlett-Packard and Intel partners such AT&T Global Information Solutions and others are already vowing to follow the new path: the aim is to have system vendors delivering products by the end of the century. The fact that the partnership has already reached its second phase indicates the tie-up having existed in some form for many months, possibly as far back as last summer Hewlett-Packard had evaluated and rejected other architectures, it says.
Offering different implementations
Hewlett-Packard and Intel will be offering different implementations of the designs, although Hewlett-Packard says it has no plans to enter the merchant market. The two have established an architectural control board to direct the overall effort, but won’t say who is on it except that it comprises their top silicon, compiler and operating system technologists. A single design shop, on the model of PowerPC’s Somerset isn’t in the plan, and whether the resulting technology will be offered to Hewlett-Packard’s current Precision Architecture licensees – Hitachi Ltd, Samsung Electronics Co and Oki Electric Industry Co Ltd still isn’t clear, although Hewlett-Packard says its PRO Precision RISC Organisation supporters club will have access to it. Guidon believes that the agreement changes everything as far as the hardware and chip mar
ket is concerned, and argues that the industry will polarise around Hewlett-Packard-Intel and to a lesser extent PowerPC. He doesn’t see any room for Alpha, R-series or Sparc. The deal isn’t necessarily exclusive and Guidon says they’d have to consider overtures from other players. He claimed the problem of how to merge the two disparate systems had been resolved by locking a group of engineers from both firms in a single building and telling them not to come out until they had solved it.
Other RISC merchants were practically gleeful last week that Intel Corp has at long last finally blinked, as MIPS Technologies Inc president Tom Whiteside put it: Intel, it believes, will be forced to eat its words about how RISC is dead and how the Intel roadmap is far superior; Whiteside seems to believe that MIPS, which is trying to import iAPX-86 compatibility into its chips, will somehow be able to out-Intel Intel and produce more efficient iAPX-86 emulation than Intel and Hewlett-Packard combined.
Phil Pompa at Motorola Inc claimed the Intel-Hewlett-Packard alliance wouldn’t slam any doors in its face – at least not immediately – or impact the PowerPC’s business plan; immediate response from the likes of Silicon Graphics Inc and Digital Equipment Corp was to the effect that they think they’re already implementing all stuff that’s way out in the Hewlett-Packard-Intel plans, and on concern about the cost – the only sure thing is that chaos will still reign, observed DEC vice-president for Unix and NT systems Willy Shih.
People received acknowledgement of the iAPX-86 discontinuity as good news: everybody is quick to admit that they need to learn more about what Hewlett-Packard Co and Intel Corp are talking about before they come to any conclusions, especially how they will be handling little local problems like endianess.
Albert Yu, vice-president and general manager of Intel Corp’s microprocessor group warned vendors, manufacturers and users of other versions of CPU if you think you had a future you don’t anymore.
The medium-term reaction is likely to be for some of the other RISC developers to join forces to counter the threat and we hear that there are other technology alliances in the wings seeking to achieve similar things: emulation technology these days is so advanced that a common successor to R-series and Alpha is by no means out of the question, and with Toshiba Corp in both the Sparc and the MIPS camps, those two architectures might be merged in future – or any one might throw its lot in with the PowerPC; meantime, NexGen Microsystems Inc and International Meta Systems Inc hold one or two aces…