Multiflow Computers Inc, the Branford, Connecticut company with the Very Long Instruction Word computers and Trace scheduling compilers may be dead, but those Trace compilers – and its core ideas – won’t lie down. Hewlett-Packard Co was one of several companies that paid $1m or so for non-exclusive rights to those Trace compilers when Multiflow […]
Multiflow Computers Inc, the Branford, Connecticut company with the Very Long Instruction Word computers and Trace scheduling compilers may be dead, but those Trace compilers – and its core ideas – won’t lie down. Hewlett-Packard Co was one of several companies that paid $1m or so for non-exclusive rights to those Trace compilers when Multiflow was winding its affairs up and raising money to pay off its debts, and it turns out that Hewlett’s planned successor to the Precision Architecture RISC, alluded to briefly in the report on its analysts’ presentation at the beginning of the month (CI No 2,310) will be a Very Long Instruction Word processor. Trace scheduling compacting compilers automatically compact operations for simultaneous execution into very long instruction words from standard Fortran and C programs – Hewlett is planning a 64-bit processor, which was the word-length on the Multiflow processors, but Multiflow used a 256-bit instruction word in combination with the Trace compilers – and the Multiflow machines were able to execute up to seven instructions per cycle – where Hewlett is talking of anything between four and 20 instructions per cycle for raw performance of several Giga-instructions per second, offering the same rate of improvement as RISC did over complex instruction set. Unlike the currently popular pipelining and superscalar techniques, Very Long Instruction Word technology uses Trace Scheduling to compile C and Fortran programs into long instruction words for simultaneous execution. The compilers are designed to keep all processes in a multiprocessing system busy, and are adaptable to architectures that can execute more than one instruction per cycle – such as RISC. The technique requires the compiler to recognise which instructions are dependent on the results of the previous one and avoid scheduling parallel execution of such instructions, while letting others go. Digital Equipment Corp was another licensee of the Trace compilers, and used them at one point in the Alpha development effort. HAL Computer Systems Inc and its new parent Fujitsu Ltd were also licensees, and even Bell Atlantic Corp was last year working on a Very Long Instruction Word 64-bit Sparc variant, having acquired rights to the compilers when its maintenance arm picked up the Multiflow base.Intel Corp also licensed the compilers for use on its Hypercube machines in return for a $4m investment in Multiflow. Hewlett-Packard is expected to fabricate its new 64-bit – or perhaps 96-bit – CPU in BiCMOS and is promising easy migration to it from Precision Architecture, and analysts reportedly look for the first machines to arrive within two years.