LSI Logic Corp yesterday unveiled G12, the latest iteration of its system-on-a-chip technology which it says is capable of combining all the functions needed to create totally new classes of communications, computer and consumer devices on a single chip. The follow-up to last year’s G11 technology (CI No 3,107) G12 is down to 0.13 micron […]
LSI Logic Corp yesterday unveiled G12, the latest iteration of its system-on-a-chip technology which it says is capable of combining all the functions needed to create totally new classes of communications, computer and consumer devices on a single chip. The follow-up to last year’s G11 technology (CI No 3,107) G12 is down to 0.13 micron Leff or 0.18m drawn, and offers 26m useable logic gates, or 223m transistors on a 0.8 by 0.8 silicon chip. LSI, which has trademarked itself as The System-on-a-Chip company, says the G12 technology gives customers new levels of integration and performance, enabling them to build system on a chip products not previously achievable on a single chip. With G12, radio frequency tuning functions up to 40Ghz can be housed on the same chip as digital logic, mixed-signal and embedded memory functions. LSI claims G12 is 40% faster than G11 and also halves power consumption while increasing logic density three-fold. It also boasts considerable cost reductions. LSI says it now offers true one-stop shopping to customers, and says it takes ownership of the whole design, so that it delivers a fully usable system to its customers. The company acknowledges it is facing increasing competition from several quarters, including foundry owners looking to increase their return on investment and offer system on a chip, as well as library providers, electronic design automation companies also offering to go beyond selling design tools to actually offering systems on a chip, and the system-on-a-chip clones, by which LSI means the Siemens AG’s and SGS Thomson NV’s of this world. However, LSI claims it has all the in-house expertise to provide both silicon level and systems level development. One fundamental difference in G12 is the use of two transistors on the same process. One is for low voltage leakage and the other for high performance. G12 also uses a Low K dielectric interface to reduce resistance capacitance delays and minimize crosstalk. LSI’s director of technical marketing, ASIC products, Ronnie Vasishta, says the company is evaluating the use of copper as an interconnect – IBM Corp and Motorola Inc are among those to have announced the use of copper (CI No 3,368) – but LSI believes it is not yet cheap enough to be a viable alternative for low cost devices. G12 first silicon was completed last year. Design libraries are currently in beta, with prototyping capability for major customers due at the end of this year and complete product qualification due in the second quarter of next year.