By Timothy Prickett-Morgan In the second half of 1999, IBM will announce the first phase of fault tolerant clustering for AS/400s, along with logical partitioning (see Top Story). OS/400 V4R4 will include a feature called cluster resource groups that will allow as many as 128 different AS/400 processors to be linked into a giant network. […]
By Timothy Prickett-Morgan
In the second half of 1999, IBM will announce the first phase of fault tolerant clustering for AS/400s, along with logical partitioning (see Top Story). OS/400 V4R4 will include a feature called cluster resource groups that will allow as many as 128 different AS/400 processors to be linked into a giant network. Network links will initially include standard LAN and ATM WAN connections, as well as the AS/400’s proprietary OptiConnect high-speed fiber optic links. In the future, IBM will add support for standard Fibre Channel server area network connections. The fault tolerant clustering inside OS/400 V4R4 will only provide application and data base failover capabilities, similar to that already offered by Lakeview Technology, DataMirror and Vision Solutions. (Vision Solutions, seeing the handwriting on the wall on its AS/400 system mirroring software business, is working with IBM to develop the V4R4 code.) Eventually — exactly when is yet unknown — OS/400’s fault tolerant clustering and data base software will be extended to provide load balancing across processor nodes in a cluster, effectively and finally bringing the capabilities long since in Tandem NonStop machines to the AS/400 base. This will put the AS/400 ahead of Windows NT in terms of clustering — it is currently only a little ahead, and only because of the innovation of IBM’s business partners, not Big Blue’s Rochester Labs. To their credit, IBM Rochester is continually held back by IBM’s mainframe division, which knows full well that the AS/400 is now and will forever be a better and cheaper mainframe than its S/390s. Logical partitioning and fault tolerant clustering is not being excluded for Pulsar machines, but will reportedly be available for any machine that uses a RISC PowerPC processor.
One of the primary motivations behind these additions is because customers have been asking for server consolidation. Why would anyone want to do this? For one thing, the cost of software and hardware for bigger AS/400s is generally less expensive per MIPS on big AS/400s than on smaller ones. The major exception is that memory capacity for baby AS/400s is half the price of that on big machines, but a little wrangling with IBM saves that. Consolidating AS/400 servers generally involves higher telecom costs, but again, rates have fallen so far so fast that even this is no longer a big issue. The savings from server consolidation and logical partitioning will be in operational and people costs, and savings here will be probably be bigger or at least more strategic than added costs from consolidation and partitioning of servers. Instead of having three MIS staffs to run three AS/400s, companies who can consolidate and use logical partitioning to support different business units will be able to get rid of excess staff, or more likely given the shortage of good IS staff, redeploy people onto e-commerce or Y2K update projects. Each AS/400 partition will require its own copy of OS/400, much as partitions in a logical VM partition need their own operating systems. IBM hasn’t said so, but it is likely that going forward from V4R4, customers will be able to mix multiple versions of the OS/400 within these partitions and thus be able to stage upgrades and test them as they move rather than just flip a switch and hope for the best. Partitioning will also allow customers to rejigger their machines as conditions and business needs require without having to physically change machines that are currently scattered around remote locations or across country boundaries.
While the specifics about AS/400 partitioning and fault tolerance are relatively clear, the underlying chip technology that is to be used in the forthcoming AS/400s is not as yet. The first generation of Pulsar chips may or may not use IBM’s copper and SOI silicon on insulator CMOS process technologies out of the gate. IBM doesn’t have to be in any hurry with the AS/400 base. Just moving from the 0.35 micron CMOS-6S2 technology the company uses in the current Northstar design to a more modern 0.25 micron CMOS-6S2 process it uses to make the Power3 chips, IBM should be able to almost double processing speed from 262 megahertz to about 500 megahertz. By moving to 0.18 micron CMOS-7SF copper process and adding SOI, IBM should be able to push clock speeds to 600 megahertz on the Pulsar design and get between 2.5 and 3 times the processing power out of that chip compared to the 262 megahertz Northstar because both copper and SOI technology respectively add 15 and 35 percent to the speed of the processor using it without the need to crank the clock. Efficient conductivity and electronic signal insulation are two very powerful tricks. We do know for certain that IBM plans to add 16-way and 24-way processors to the AS/400 line. These could be Northstar PowerPC machines announced in the spring at COMMON or Lotusphere if IBM feels the need for announcement hoopla to boost first and second quarter 1999 sales, but it is far more likely that the bigger AS/400e SMP machines will also use the Pulsar chip. IBM’s RS/6000 division has said for certain that 24-way RS/6000 servers using Pulsar will be available in the summer of 1999, and these machines are virtually identical to the AS/400e Pulsar servers — they differ only in their I/O, with RS/6000s using PCI peripherals and the AS/400 using proprietary (and faster) SPD peripherals.