Mercury Computer Systems Inc, which specializes in packing as many microprocessors as possible on a single board and making it possible to scale the systems further by clustering the boards. The company’s RACE systems can also mix and match microprocessors – currently Intel Corp’s 80860 RISC (remember that?) the PowerPC, and the Analog Devices Inc […]
Mercury Computer Systems Inc, which specializes in packing as many microprocessors as possible on a single board and making it possible to scale the systems further by clustering the boards. The company’s RACE systems can also mix and match microprocessors – currently Intel Corp’s 80860 RISC (remember that?) the PowerPC, and the Analog Devices Inc SHARC signal processor. Another signal processor, the Texas Instruments Inc TMS320C80, will be added later this year. The Boston company says it plans to increase aggregate input-output bandwidth to 6.4G-bytes per second as well as introducing new system models in the second half of the year, which will enable RACE systems to scale to in excess of 1,000 processors of mixed types, while maintaining a single-system logical view for the developer. The Mercury systems use a RACEway Interlink high-bandwidth system area network interconnect architecture using a series of six-port crossbar switches. Present systems use a single RACEway Interlink port connecting each board to the system network but the new ones will implement dual- and quad-port RACEway interconnects. The dual-port implementation, which uses the 160-pin VMEbus can be configured to provide aggregate input-output bandwidth of over 2.5G-bytes per second. The quad-port systems will house several VMEbus slots, which will accept standard VMEbus boards as well as single- and dual-port RACEway boards, and quad-port slots designed for massive real-time processing compute engines. On the software side, the firm is now shipping its MC/OS run-time environment 4 – the first to support combinations of 80860 and PowerPC RISCs and SHARC signal processors in a single system. The idea is that system builders should be able to develop their real-time embedded signal processing applications using the processor best suited to each task to maximize system performance and minimize total CPU count. The software supports the leading programming paradigms: Single Program Multiple Data, Multiple Program Multiple Data; Dataflow; and Parallel, which can be mixed and matched. The new MC/OS 4 is designed to enable rapid insertion of new processors as they arrive and also supports Solaris and VxWorks kernels. The systems are aimed at diagnostic medical imaging, commercial and defence image and radar processing, and servers for digital media editing. No prices were offered.