Integrates receiver and transmitter SerDes functions on single chip
NetLogic Microsystems has unveiled NLP1220 dual-port 8.5Gbps FibreChannel PHY repeater device with an integrated low-power equalisation engine. It offers power consumption and latency to customers developing data centre switches and storage host bus adapters (HBAs).
The company claims that the new device offers superior transmit and receive jitter performance as a result of the integrated LC phase locked loop circuit and an advanced second-order clock-and-data recovery (CDR) design.
In addition, the granular power-down modes for the transmit, receive and equaliser circuitry, combined with an analog/digital hybrid architecture, provide customers with low power and low latency profiles, making it suitable for high-density data centre applications, the company said.
According to NetLogic Microsystems, the NLP1220 PHY device integrates the receiver and transmitter SerDes functions on a single chip with on-chip clock drivers, multiple loop-back features and PBRS generation and verification for both the line side and system side.
The integrated low-power equalisation engine doubles the reach of FibreChannel signals on PCB traces and cables, supporting up to 15 meters on 24/26 AWG cables and up to 10 meters on 30 AWG cables, the company said.
Stefanos Sidiropoulos, vice president of the physical layer products at NetLogic Microsystems, said: “Our NLP1220 product extends our 10 gigabit ethernet SerDes technology and market leadership into the enterprise storage and data center markets. We are excited to see the strong interest for our new Fibre Channel PHY product from multiple customers.”