Reports from deep within the ultra-secret Hewlett-Packard Co-Intel Corp chip collaboration hint that the effort lost about six months to the lawyers wrestling with who will own what and how to market it. Apparently the two companies used the opportunity to determine better how to approach the collaboration and what impact their decisions would ultimately […]
Reports from deep within the ultra-secret Hewlett-Packard Co-Intel Corp chip collaboration hint that the effort lost about six months to the lawyers wrestling with who will own what and how to market it. Apparently the two companies used the opportunity to determine better how to approach the collaboration and what impact their decisions would ultimately have on them, today’s edition of Unigram.X reports. Now, near as we can tell, we probably shouldn’t expect a chip before early 1998 and boxes late the same year. Meantime Computerworld hears that a whole family of chips is in development, ranging from low-cost parts for desktops and laptops to high-end server chips, and that all will run HP-UX, Windows NT and NetWare. And Hewlett-Packard has been saying that it intends to run HP-UX and the successor to Windows95 – Cairo presumably, concurrently on the same chip. According to our sister paper Unigram, folk from Hewlett’s Engineering Systems Laboratories, part of the system technology division in Fort Collins, Colorado, were supposed to move to California this summer for at least a two-year stint working with Intel on the part, code-named H1, transferring the more seminal Very Long Instruction Word work from the think tank into actual design. Needless to say, it hasn’t happened: indeed it may not happen at all now, as we learn that Hewlett is short of people and has other chips to be developed. Insiders even question whether the whole thing was a good idea in the first place. Meanwhile, although it had been thought the that Hewlett had dubbed the first combined processor Tahoe (CI No 2,689), it is now clear that that is the code name for the hybrid Very Long Instruction Word scheme the Hewlett Labs has dreamed up to avoid the real-time delays the traditional implementation of the Long Instruction Word technology – the term actually refers to a string of standard instructions that the compiler has chosen for their ability to be executed concurrently, so if each instruction is thought of as a byte, a string of them creates the long word. The first chip is code-named H1; the new architecture will create legacy instructions at the compiler level: the effect is said to be a retreat from pure RISC to a more complex instruction set architecture, as one might expect. Insiders say that Hewlett-Packard hesitates to put a real name on the hybrid scheme because it doesn’t want to commit itself to a precise specification. Hewlett-Packard and Intel were telling analysts back in May that simulations showed that the new chip would be backwards-compatible.