Synopsys intends to address the verification challenges designers face
Synopsys has completed the acquisition of an independent provider of verification IP (VIP) – nSys Design Systems.
With this acquisition, Synopsys intends to address the growing verification challenges designers face as they create more and more complex systems on chips (SoCs) to serve the demand for ‘smart’ electronics.
VIP provides functional models of on- and off-chip protocols and enables the engineer to verify how an interface conforms to published standards.
VIP also allows the engineer to validate the interactions among various interfaces on an SoC.
The expanded portfolio of VIP from Synopsys will cover all of the widely used interface protocols and many emerging titles.
It will also offer a new protocol compliance test-suite product line.
Supported verification methodologies include VMM (verification methodology manual), OVM (open verification methodology) and UVM (universal verification methodology).
Synopsys Verification Group senior vice president and general manager Manoj Gandhi said addressing the growing SoC design and verification challenge is a key focus for the company.
"With leading SoC designs deploying more complex protocols, VIP is becoming a critical component of the verification environment," Gandhi said.
nSys Design Systems CEO and founder Atul Bhatia said Synopsys has led the industry in SystemVerilog, performance, capacity, methodology and bug-finding technology innovations for the past 15 years.