Synoptics Communications Inc has plunged into the Asynchronous Transfer Mode switch market with the development of a chip set that will appear in the third quarter of next year. Unlike Adaptive Corp, which plumped for a bus-based approach for its first Asynchronous Transfer Mode switches, Santa Clara, California-based Synoptics says that the six-piece chip set, […]
Synoptics Communications Inc has plunged into the Asynchronous Transfer Mode switch market with the development of a chip set that will appear in the third quarter of next year. Unlike Adaptive Corp, which plumped for a bus-based approach for its first Asynchronous Transfer Mode switches, Santa Clara, California-based Synoptics says that the six-piece chip set, the product of a technology partnership with Washington State University, implements a matrix switch architecture. This, it says, avoids bottlenecks inherent in the bus approach and aids scalability. At this point, we plan to use the chip set in both stand-alone switches and hubs, says Bert Williams, the company’s product marketing manager, adding that the company has no plans currently to licence the chip set to other manufacturers. Neither is it tempted to try and sell switches to telecommunications operators. Instead, it is targeting its home ground, local area networks, with the initial focus on using Asynchronous Transfer Mode to build backbones, rather than Asynchronous Transfer Mode to the desktop. The company claims to have spent $10m and had a team of 25 working on Asynchronous Transfer Mode research since 1989, and that the first prototype chips are back from the foundry. No magic there But Williams does note foresee any particular problems in manufacturing the actual silicon, commenting that there’s no magic there. The chip set consists of a Cell Switch Unit which performs the basics, including copying, distribution and routing; the Broadcast Translation Unit translates the Asynchronous Transfer Mode cell header for each copy of the the cell for multi-casting; the Port Controller performs virtual channel identifier look-up for incoming cell and provides management support; the Transmit Buffer Controller controls the switch output buffer and re-orders cells. Together, these four chips form the core of the product. The other two included in the set are the Fabric First In-First Out Controller, which controls the transfer of cells between the switch fabric and the switch controller, and the Physical Layer Framer which handles the electrical interfacing and cell framing for the physical interface. The number of buffering components in the chip set and the fact that it re-orders switched cells raises questions about the latency of the switch – the time that cells are tied up passing through it. But Williams says that this is not a problem since the internal speed of the chip set is substantially faster than that of the incoming links. The matrix switch architecture enables each port to run at 155Mbps, says Synoptics, and separate ports can be aggregated to create up to 622Mbps links. The description of the architecture is a none-too-subtle swipe at Network Equipment Technologies Corp’s Adaptive unit, whose first Asynchronous Transfer Mode switches will be bus-based. Synoptics also disagrees with Adaptive on the way to market Asynchronous Transfer Mode switches. Williams believes Asynchronous Transfer Mode, Ethernet and FDDI will happily co-exist for quite some time. While there will be a market for a standalone Asynchronous Transfer Mode workgroup, the company’s background documentation describes this as niche, arguing that the first major use will be in campus backbones during 1994 and 1995. Desktop connections? With full local and wide area network integration, not till 1994 or 1995.