The Virtual Socket Interface Alliance, which is developing open technical standards hoped to enable the mix-and-match of intellectual property to accelerate the growth of the system chip market, says it should have the first deliverable evidence of its work ready by June this year. The Alliance says its Mixed Signal Working Group should be ready […]
The Virtual Socket Interface Alliance, which is developing open technical standards hoped to enable the mix-and-match of intellectual property to accelerate the growth of the system chip market, says it should have the first deliverable evidence of its work ready by June this year. The Alliance says its Mixed Signal Working Group should be ready in June with a standard definition of how analog and digital signals should be combined on a single chip. System chips themselves are defined by Dataquest Inc as chips with more than 100,000 gates, at least one programmable core and memory. But Dataquest says system chips are not feasible for the volume market yet because of the lack of standards, and this is where the alliance says it can help. This open organization now includes over 85 members from all segments of the system chip industry – including chip manufacturers, consumer electronics manufacturers, intellectual property providers and design automation specialists – and was formed last year by Cadence Design Systems Inc (CI No 2,991). Doug Fairbairn, vice- president of Cadence and also a member of the Alliance’s steering working group, explains that the need for an organization to lay down standards in this area is critical: It’s our only hope of meeting the design challenges that the industry is now faced with, he says. Billions of dollars are being poured into chip manufacture, but the design investment is falling behind.
This has created a ‘design gap’; a gap between what can affordably be manufactured and what can affordably be designed. Chips have as many as 2 million gates today; by the end of the century that figure could be 5 to 10 million, according to Fairbairn. He argues that system-chip manufacturers can no longer afford to design all of the components of each and every chip, just as car manufacturers no longer design every component themselves. Instead, he says, they must have access to building blocks known as System Level Macros, designed according to a standard specification laid down by the Alliance and its working groups. The major driver behind system chips is consumer electronics – appliances like mobile phones and games consoles may in the future contain a few system chips rather than hundreds of chips on circuit boards, bringing huge reductions in the cost of making these products. System chips are also expected to have a profound effect on the computer industry, with early applications for system chips being input/output devices, though some foresee system chips replacing entire circuit boards. The standard definitions being laid down by the Virtual Socket Interface Alliance are hoped to enable manufacturers to easily integrate system chips into their designs, leaving them free to concentrate on their own specialized added value. The Alliance’s longer-term vision is of a world-wide intellectual property network, which will give manufacturers access to those standard system chip definitions through the Internet.