Sigrity, a provider of software for analyzing power and signal integrity in chips, packages and printed circuit boards, has unveiled its Channel Designer, an advanced analysis system. The system offers the flexibility and accuracy required for high-speed serial links.
According to the company, Channel Designer has many features to help designers at every stage from feasibility studies through design verification. Its net-based block-wise schematic editor supports design capture for a single net interconnect or a complete bus traversing multiple boards.
Sigrity’s model connection protocol (MCP) automatically connects circuit models for each element of the channel identified in the schematic. Channel templates of board, package and connector structures are provided.
Detailed models extracted from physical layout user databases are swapped in as designs progress. Channel Designer fully supports the IBIS algorithmic modeling interface (AMI), which has emerged as the industry standard for transmitter and receiver modeling.
Sigrity has said that its Channel Designer uses equalization and clock data recovery (CDR) modeling to anticipate the behavior of serial links, and it simulates design alternatives. Advanced scenario sweep automation identifies design boundaries.
Channel Designer also includes automated crosstalk analysis that specifically targets crosstalk-induced jitter and noise arising in links operating at more than 10Gb per second.