Reduces the area of control circuits to achieve better cell efficiency
NEC Corporation, a provider of internet, broadband network and enterprise business services, and NEC Electronics have developed 32Mb magnetic random access memory that can be embedded in system on chips.
NEC has said that the two companies have reduced the area of control circuits in the 32Mb magnetic random access memory (MRAM) design in order to achieve better cell efficiency that enables 73% of a memory macro’s area to be allocated to memory cells. This demonstration supports the possibility of applying high-speed MRAM technologies to system large scale integrations, which is required in order to embed larger capacity MRAM macros with larger sized cells.
The latest demonstrations adapted MRAM macro cell arrays with NEC’s newly developed write circuits to achieve macro cell efficiency of 73%. This both reduced MRAM macro size and enlarged memory capacity, said NEC.
NEC claims that the 32Mb MRAM chip has a protocol transform circuit between the MRAM macro and I/O buffer circuits. The MRAM is compatible with an asynchronous SRAM. By changing the protocol transform circuit, MRAM becomes compatible with any kind of memory.